Many present day electronic devices include very complex and expensive printed circuit boards. These electronic devices may also include high-speed differential clocks. Proper design of electronic devices includes testing the operating margins of the devices prior to release for production. One of the margin tests commonly used in design is to skew clock edges to determine how far out-of-alignment clock edges may get before failure occurs. It is quite easy to add delay to a clock trace, a socket may be designed into the printed circuit board configured to accept a variety of delay lines. By changing the delay lines in the socket, a variety of clock skews may be tested. However, there is no easy way to add negative clock skew to an existing clock trace. There is a need in the art for a method and apparatus allowing designers to test both negative and positive clock skews.
Also, since printed circuit boards may be highly complex and very expensive to design, there is a need in the art for a printed circuit board capable of producing both negative and positive clock skews in a test mode, while the same printed circuit board design may be used for production without any clock skew.